Hello
I am trying to synthesize my design in RTL Compiler v8.0 with CPF1.0 . i am using 45nm NanGateOpenCellLibrary.
I am getting 2-Errors while synthesizing my design with CPF (PSO) method on RC compiler.....
1) create_state_retention_rule
2) create_isolation_rule
these 2 cells creation failed .while in my CPF design part i decleared them as........
create_isolation_rule -name iso1 -from PD_xbus_hw_idct_rtl -isolation_condition {powercontrol.iso_en}
create_isolation_rule -name iso2 -to PD_default -isolation_condition { powercontrol.iso_en} -isolation_output high
create_state_retention_rule -name st1 -domain PD_xbus_hw_idct_rtl -restore_edge {!powercontrol.ret_en}
the log file is stated as ......result.
Statistics of CPF commands processed
------------------------------------
Command failed successful unsupported total runtime
1. create_global_connection 0 0 6 6 0.00
2. create_ground_nets 0 0 1 1 0.00
3. create_isolation_rule 2 0 0 2 0.00
4. create_nominal_condition 0 2 0 2 0.00
5. create_power_domain 0 2 0 2 0.00
6. create_power_mode 0 2 0 2 3.00
7. create_power_nets 0 0 3 3 0.00
8. create_power_switch_rule 0 0 1 1 0.00
9. create_state_retention_rule 1 0 0 1 0.00
10. define_always_on_cell 0 1 0 1 0.00
11. define_isolation_cell 0 4 0 2 0.00
12. define_library_set 0 1 0 1 0.00
13. define_power_switch_cell 0 0 1 1 0.00
14. define_state_retention_cell 0 2 0 1 1.00
15. end_design 0 1 0 1 0.00
16. set_design 0 1 0 1 0.00
17. set_hierarchy_separator 0 1 0 1 0.00
18. set_power_unit 0 1 0 1 0.00
19. update_isolation_rules 0 1 0 1 0.00
20. update_nominal_condition 0 1 0 1 0.00
21. update_power_domain 0 2 0 2 0.00
22. update_power_mode 0 2 0 2 0.00
23. update_power_switch_rule 0 0 1 1 0.00
Completed processing all CPF commands (runtime 5.00).
rc:/designs/topmodule> cd
rc:/> clear
any suggestion...